A Level-up Shifter using MTCMOS Technique for Power Minimization
نویسندگان
چکیده
Level shifter is an interfacing circuit which can interface low core voltage to high input-output voltage. It allows communication between different modules without adding up any extra supply pin. The main objective of the work is to minimize power dissipation in shifter circuit, which is due to different supply voltages in the circuit. The proposed method uses MTCMOS technique, which is one of the low power design technique to achieve power minimization. The new circuit uses the multi-threshold CMOS technique to provide a wide voltage conversion . The proposed design is implemented in CADENCE Virtuoso 180-nm CMOS technology. The new LS reaches a propagation delay value of 17 ns, a static power dissipation of only 115.3 pW, for a 1-MHz input pulse. KeywordsLevel Shifter, Sub-threshold, MTCMOS, low power, low voltage.
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